Mail Index

• Thread Index

• Re: [openrisc] Error compiling or1ksim on freeBSD 4.7
  • From: javier_castillo_villar@yahoo.es
• Re: [openrisc] Error compiling or1ksim on freeBSD 4.7
  • From: Richard Prescott <rip@step.polymtl.ca>
• Re: [openrisc] Error compiling or1ksim on freeBSD 4.7
  • From: Richard Prescott <rip@step.polymtl.ca>
• Re: [openrisc] Error compiling or1ksim on freeBSD 4.7
  • From: Simon Srot <simons@opencores.org>
• Re: [openrisc] Error compiling or1ksim on freeBSD 4.7
  • From: javier_castillo_villar@yahoo.es
• [openrisc] Error compiling or1ksim on freeBSD 4.7
  • From: javier_castillo_villar@yahoo.es
• Re: [openrisc] Different opcodes between OR1000 and OR1200
  • From: Marko Mlinar <markom@opencores.org>
• Re: [openrisc] Different opcodes between OR1000 and OR1200
  • From: "Damjan Lampret" <lampret@opencores.org>
• [openrisc] Different opcodes between OR1000 and OR1200
  • From: Marķa Bolado <mbolado@mundivia.es>
• Re: [openrisc] [PATCH] Would you like to have UART0 in a xterm ?
  • From: "Damjan Lampret" <lampret@opencores.org>
• [openrisc] CAN Interface for Flex10K
  • From: "Manuk Shmeyan" <s_manuk@freenet.am>
• Re: [openrisc] [PATCH] Would you like to have UART0 in a xterm ?
  • From: Richard Prescott <rip@step.polymtl.ca>
• Re: [openrisc] clueless regarding or1ksim/testbench
  • From: Simon Srot <simons@opencores.org>
• [openrisc] Re: Re: questions about your program "jp1.c"
  • From: Marko Mlinar <markom@opencores.org>
• Re: [openrisc] [PATCH] Would you like to have UART0 in a xterm ?
  • From: Marko Mlinar <markom@opencores.org>
• Re: [openrisc] [PATCH] Would you like to have UART0 in a xterm ?
  • From: Richard Prescott <rip@step.polymtl.ca>
• [openrisc] clueless regarding or1ksim/testbench
  • From: Richard Prescott <rip@step.polymtl.ca>
• [openrisc] RE:data cache in or1ksim
  • From: javier_castillo_villar@yahoo.es
• Re: [openrisc] data cache and or1ksim
  • From: "xxxx" <meleth_esp@yahoo.es>
• Re: [openrisc] [PATCH] Would you like to have UART0 in a xterm ?
  • From: Marko Mlinar <markom@opencores.org>
• Re: [openrisc] [PATCH] Would you like to have UART0 in a xterm ?
  • From: Richard Prescott <rip@step.polymtl.ca>
• Re: [openrisc] data cache and or1ksim
  • From: Simon Srot <simons@opencores.org>
• [openrisc] data cache and or1ksim
  • From: javier_castillo_villar@yahoo.es
• Re: [openrisc] fast_config.c
  • From: Marko Mlinar <markom@opencores.org>
• Re: [openrisc] [PATCH] Would you like to have UART0 in a xterm ?
  • From: Marko Mlinar <markom@opencores.org>
• [openrisc] VHDL - 2d cross correlation
  • From: otteridiz@aol.com
• [openrisc] fast_config.c
  • From: Richard Prescott <rip@step.polymtl.ca>
• [openrisc] [PATCH] Would you like to have UART0 in a xterm ?
  • From: Richard Prescott <rip@step.polymtl.ca>
• Re: [openrisc] problems with or1ksim
  • From: Marko Mlinar <markom@opencores.org>
• [openrisc] Information
  • From: "SL Center" <saamlanguagev@tutopia.com>
• Re: [openrisc] problems with or1ksim
  • From: Nan Zhou <lavender_uc@yahoo.com>
• Re: [openrisc] mprofile order in sim.cfg doesnt work
  • From: Marko Mlinar <markom@opencores.org>
• Re: [openrisc] GDB remote serial protocol and JTAG
  • From: Marko Mlinar <markom@opencores.org>
• [openrisc] mprofile order in sim.cfg doesnt work
  • From: "JCastillo" <javier_castillo_villar@yahoo.es>
• Re: [openrisc] GDB remote serial protocol and JTAG
  • From: "xxxx" <meleth_esp@yahoo.es>
• Re: [openrisc] GDB remote serial protocol and JTAG
  • From: "Damjan Lampret" <lampret@opencores.org>
• Re: [openrisc] GDB remote serial protocol and JTAG
  • From: Marko Mlinar <markom@opencores.org>
• [openrisc] GDB remote serial protocol and JTAG
  • From: javier_castillo_villar@yahoo.es
• Re: [openrisc] problems with or1ksim
  • From: javier_castillo_villar@yahoo.es
• Re: [openrisc] problems with or1ksim
  • From: Marko Mlinar <markom@opencores.org>
• Re: [openrisc] problems with or1ksim
  • From: javier_castillo_villar@yahoo.es
• Re: [openrisc] genromfs and mke2fs
  • From: Simon Srot <simons@opencores.org>
• Re: [openrisc] or1ksim
  • From: Richard Herveille <richard@asics.ws>
• [openrisc] genromfs and mke2fs
  • From: javier_castillo_villar@yahoo.es
• Re: [openrisc] uclibc compilation error
  • From: javier_castillo_villar@yahoo.es
• Re: [openrisc] problems with or1ksim
  • From: Simon Srot <simons@opencores.org>
• Re: [openrisc] or1ksim
  • From: Marko Mlinar <markom@opencores.org>
• Re: [openrisc] or1ksim
  • From: Richard Herveille <richard@asics.ws>
• Re: [openrisc] or1ksim
  • From: Marko Mlinar <markom@opencores.org>
• Re: [openrisc] problems with or1ksim
  • From: Marko Mlinar <markom@opencores.org>
• [openrisc] or1ksim
  • From: "Damjan Lampret" <lampret@opencores.org>
• [openrisc] problems with or1ksim
  • From: Nan Zhou <lavender_uc@yahoo.com>
• Re: [openrisc] uclibc compilation error
  • From: Richard Prescott <rip@step.polymtl.ca>
• Re: [openrisc] uclibc compilation error
  • From: Alain Carpine <alain.carpine@free.fr>
• Re: [openrisc] [PATCH] binutils build with bison 1.50
  • From: "Jim Dempsey" <tapedisk@ameritech.net>
• Re: [openrisc] CID bits and shadow registers
  • From: Marko Mlinar <markom@opencores.org>
• Re: [openrisc] uclibc compilation error
  • From: javier_castillo_villar@yahoo.es
• [openrisc] CID bits and shadow registers
  • From: mbtirado@mundivia.es
• Re: [openrisc] uclibc compilation error
  • From: Simon Srot <simons@opencores.org>
• Re: [openrisc] uclibc compilation error
  • From: "JCastillo" <javier_castillo_villar@yahoo.es>
• Re: [openrisc] [PATCH] binutils build with bison 1.50
  • From: Marko Mlinar <markom@opencores.org>
• [openrisc] orpmon and xsv_board
  • From: maunal moren <maunal02@yahoo.com>
• Re: [openrisc] [PATCH] binutils build with bison 1.50
  • From: p2@mind.be (Peter 'p2' De Schrijver)
• Re: [openrisc] [PATCH] binutils build with bison 1.50
  • From: Marko Mlinar <markom@opencores.org>
• Re: [openrisc] uclibc compilation error
  • From: Marko Mlinar <markom@opencores.org>
• Re: [openrisc] Multiprocessing and virtual memory
  • From: Marko Mlinar <markom@opencores.org>
• [openrisc] [PATCH] or1ksim
  • From: p2@mind.be (Peter 'p2' De Schrijver)
• [openrisc] [PATCH] gcc build with bison 1.50
  • From: p2@mind.be (Peter 'p2' De Schrijver)
• [openrisc] [PATCH] binutils build with bison 1.50
  • From: p2@mind.be (Peter 'p2' De Schrijver)
• [openrisc] RTEMS compilation error
  • From: javier_castillo_villar@yahoo.es
• [openrisc] uclibc compilation error
  • From: javier_castillo_villar@yahoo.es
• [openrisc] uclibc compilation error
  • From: javier_castillo_villar@yahoo.es
• [openrisc] uclibc compilation error
  • From: javier_castillo_villar@yahoo.es
• Re: [openrisc] Multiprocessing and virtual memory
  • From: mbtirado@mundivia.com
• Re: [openrisc] Multiprocessing and virtual memory
  • From: Marko Mlinar <markom@opencores.org>
• [openrisc] Multiprocessing and virtual memory
  • From: mbtirado@mundivia.es
• Re: [openrisc] CID bits in OR1000 and OR1200
  • From: Marko Mlinar <markom@opencores.org>
• Re: [openrisc] ELF code location
  • From: Marko Mlinar <markom@opencores.org>
• [openrisc] ELF code location
  • From: javier_castillo_villar@yahoo.es
• [openrisc] CID bits in OR1000 and OR1200
  • From: mbtirado@mundivia.es
• Re: [openrisc] Integer multiplications and floating point instructions in GCC
  • From: Marko Mlinar <markom@opencores.org>
• [openrisc] Integer multiplications and floating point instructions in GCC
  • From: javier_castillo_villar@yahoo.es
• [openrisc] Atmel's EPM7128 programming????
  • From: "Manuk Shmeyan" <s_manuk@freenet.am>
• Re: [openrisc]
  • From: "Damjan Lampret" <lampret@opencores.org>