1. Overview
2. Static Timing Analysis
3. Introduction to Programming with Tcl
4. Examples
5. Inverter
6. Inverter Chain
7. Adder
8. Master-Slave Flip-Flop
9. Addaccu
10. CPU2901
11. Hierarchical Analysis
12. Analog Blocks Handling
13. SSTA

Chapter 2 Subsections

2. Static Timing Analysis
2. 1. Timing Analysis Theory
2. 1. 1. Timing Analysis Goals
2. 1. 2. Timing Analysis in the Design Flow
2. 2. Definitions
2. 2. 1. Delay Modeling
Signal Propagation through a Simple Inverter
Signal Propagation through an RC Network
2. 2. 2. Slope Modeling
2. 2. 3. Delay Dependancies
2. 3. Delay Calculation
2. 3. 1. Electrical Simulation
Simple Gates
Complex Designs
Limitations
2. 3. 2. Static Timing Analysis
STA Basics
Graph Modeling
2. 3. 3. Gate Characterization Methodology
2. 4. Timing Analysis
2. 4. 1. What Needs to be Checked?
2. 4. 2. The Behavior of Sequential Elements
Latch
Flip-Flop
Dynamic Logic
2. 4. 3. Sequential Design Analysis
Maximum Operating Frequency in Flip-Flop Based Designs
Skew Impact Analysis
2. 4. 4. Global Characterization
Global Setup and Hold Times
Access Time