Hi Is there a way to rebuild or1ksim from "or1200" *.v verilog source? That is, can I add an instruction to or1200, and then rebuild the or1ksim, to test the new instruction? If not, is there another way to test modification to or1200? Thanks. -- To unsubscribe from openrisc mailing list please visit http://www.opencores.org/mailinglists.shtml