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Re: [openrisc] OR16 ISA
I don't get it.
how to squeeze the following 8-bit opcode into 4-bit?
Best regards, Jimmy
"Damjan Lampret" <lampret@opencores.org> 於 2000/05/25 06:13:04 PM
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副本抄送: (副本密送: jimmy87/Sunplus)
主旨: Re: [openrisc] OR16 ISA
This is getting better. But don't you think we could use huffman's encoding
for opcodes to get most out of encoding space. For example couldn't the
following opcodes be squeezed in 4 bits and then you can have another
register in the instruction?
--damjan
> insns to load byte/halfwords. I think it's still ok!
> Best regards, Jimmy
>
>
> { "h.lhzpain", "rA,N", "0x5 0x4 AAAA NNNN"},
> { "h.lbzpain", "rA,N", "0x5 0x5 AAAA NNNN"},
>
> { "h.lhspain", "rA,N", "0x5 0x6 AAAA NNNN"},
> { "h.lbspain", "rA,N", "0x5 0x7 AAAA NNNN"},
>
>
>