head	1.4;
access;
symbols
	rel_1_1:1.4
	rel_1_0:1.4
	rel_0_6_1_beta:1.2
	rel_0_6__beta:1.2
	rel_0_6_beta:1.2
	rel_0_5_beta:1.2
	rel_0_4_beta:1.2
	rel_0_3_beta:1.2
	rel_0_2_beta:1.2
	rel_0_1_beta:1.1;
locks; strict;
comment	@# @;


1.4
date	2006.06.24.00.50.46;	author arniml;	state Exp;
branches;
next	1.3;
commitid	61c1449c8c504567;

1.3
date	2006.06.21.01.04.50;	author arniml;	state Exp;
branches;
next	1.2;
commitid	591c44989b314567;

1.2
date	2004.05.21.11.26.56;	author arniml;	state Exp;
branches;
next	1.1;

1.1
date	2004.03.25.22.32.32;	author arniml;	state Exp;
branches;
next	;


desc
@@


1.4
log
@adapt t48 external ROM offset
@
text
@
.PHONY: all
all: t3x t48 t49

.PHONY: t3x
t3x: $(SIM_DIR)/rom_t3x.hex $(SIM_DIR)/rom_t3x_ext.hex

.PHONY: t48
t48: $(SIM_DIR)/rom_t48.hex $(SIM_DIR)/rom_t48_ext.hex

.PHONY: t49
t49: $(SIM_DIR)/rom_t49.hex $(SIM_DIR)/rom_t49_ext.hex


$(MODULE).p: $(MODULE).asm
	asl -i $(VERIF_DIR)/include -L $<

$(SIM_DIR)/rom_t3x.hex: $(MODULE).p
	p2hex -r 0-0 $< $@@
$(SIM_DIR)/rom_t3x_ext.hex: $(MODULE).p
	p2hex -r 0-4095 $< $@@

$(SIM_DIR)/rom_t48.hex: $(MODULE).p
	p2hex -r 0-1023 $< $@@
# lowest 1k of external ROM will not be used
$(SIM_DIR)/rom_t48_ext.hex: $(MODULE).p
	p2hex -r 1024-4095 $< $@@

$(SIM_DIR)/rom_t49.hex: $(MODULE).p
	p2hex -r 0-2047 $< $@@
$(SIM_DIR)/rom_t49_ext.hex: $(MODULE).p
	p2hex -a -r 2048-4095 $< $@@

.PHONY: clean
clean:
	rm -f *.p *~ *.hex *.lst
@


1.3
log
@rework hex/simulation targets
@
text
@d25 1
d27 1
a27 1
	p2hex -a -r 1024-4095 $< $@@
@


1.2
log
@generate two ROM files based on address:
  +    0 - 2047 : 2k internal ROM
  + 2048 - 4095 : 2k external ROM
@
text
@d3 11
a13 1
all: t48_rom.hex t48_ext_rom.hex
d16 1
a16 1
	asl -i $(VERIF_DIR)/include -L $(MODULE).asm
d18 4
a21 2
t48_rom.hex: $(MODULE).p
	p2hex -r 0-2047 $(MODULE).p t48_rom.hex
d23 4
a26 2
t48_ext_rom.hex: $(MODULE).p
	p2hex -a -r 2048-4095 $(MODULE).p t48_ext_rom.hex
d28 4
a31 3
.PHONY: simu
simu: all
	cp t48_rom.hex t48_ext_rom.hex $(SIM_DIR)
@


1.1
log
@initial check-in
@
text
@d3 1
a3 1
all: t48_rom.hex
d9 4
a12 1
	p2hex $(MODULE).p t48_rom.hex
d16 1
a16 1
	cp t48_rom.hex $(SIM_DIR)
@