head	1.6;
access;
symbols
	rel_1_1:1.6
	rel_1_0:1.6
	rel_0_1_beta:1.4
	LOC_CVS_0_1:1.1.1.1
	LOC_CVS:1.1.1;
locks; strict;
comment	@# @;


1.6
date	2006.06.11.23.52.06;	author arniml;	state Exp;
branches;
next	1.5;
commitid	120d448caca14567;

1.5
date	2006.06.10.18.50.20;	author arniml;	state Exp;
branches;
next	1.4;
commitid	39b0448b14624567;

1.4
date	2006.06.05.21.06.15;	author arniml;	state Exp;
branches;
next	1.3;
commitid	7bf444849cbd4567;

1.3
date	2006.05.27.19.07.08;	author arniml;	state Exp;
branches;
next	1.2;
commitid	3034478a3574567;

1.2
date	2006.05.14.22.32.10;	author arniml;	state Exp;
branches;
next	1.1;
commitid	7b4f4467afe94567;

1.1
date	2006.05.06.01.56.45;	author arniml;	state Exp;
branches
	1.1.1.1;
next	;
commitid	7cbf445c02434567;

1.1.1.1
date	2006.05.06.01.56.45;	author arniml;	state Exp;
branches;
next	;
commitid	7cbf445c02434567;


desc
@@


1.6
log
@process t420 tag
@
text
@
SIM_DIR   = $(PROJECT_DIR)/sim/rtl_sim
VERIF_DIR = $(PROJECT_DIR)/sw/verif

# determine allowed targets
TARGETS = $(wildcard t4* int mb prod)

.PHONY: all
all: $(TARGETS)

.PHONY: t41x
t41x: $(SIM_DIR)/rom_41x.hex

.PHONY: t42x
t42x: $(SIM_DIR)/rom_42x.hex

.PHONY: t420
t420: t42x

.PHONY: int
int: t42x

.PHONY: mb
mb: t42x

.PHONY: prod
prod: t42x

$(SIM_DIR)/rom_41x.hex: $(MODULE)_41x.p
	p2hex $< $@@

$(SIM_DIR)/rom_42x.hex: $(MODULE)_42x.p
	p2hex $< $@@

$(MODULE)_41x.p: $(MODULE).asm
	asl -i $(VERIF_DIR)/include -cpu COP410 -L \
            -o $(MODULE)_41x.p -olist $(MODULE)_41x.lst $<

$(MODULE)_42x.p: $(MODULE).asm
	asl -i $(VERIF_DIR)/include -cpu COP420 -L \
            -o $(MODULE)_42x.p -olist $(MODULE)_42x.lst $<

.PHONY: clean
clean:
	rm -f *.p *~ *.lst
@


1.5
log
@added testclass 'prod'
@
text
@d17 3
@


1.4
log
@mb target added
@
text
@d6 1
a6 1
TARGETS = $(wildcard t4* int mb)
d23 3
@


1.3
log
@int target added
@
text
@d6 1
a6 1
TARGETS = $(wildcard t4* int)
d18 4
a21 1
int: $(SIM_DIR)/rom_42x.hex
@


1.2
log
@enabled t420 support
@
text
@d6 1
a6 1
TARGETS = $(wildcard t4*)
d17 3
@


1.1
log
@Initial revision
@
text
@d15 1
a15 1
t42x:
@


1.1.1.1
log
@import from local CVS repository, LOC_CVS_0_1
@
text
@@