head	1.1;
access;
symbols
	rel_19:1.1
	rel_12:1.1
	rel_2:1.1;
locks; strict;
comment	@# @;


1.1
date	2003.06.05.11.33.36;	author simont;	state Exp;
branches;
next	;


desc
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1.1
log
@initial inport.
@
text
@#-- Synplicity, Inc.
#-- Version 7.2        
#-- Project file /shared/projects/oc8051/simont/oc8051/syn/synplify/oc8051.prd
#-- Written on Thu Jun  5 11:22:01 2003

#
### Watch Implementation type ###
#
watch_impl -active
#
### Watch Implementation properties ###
#
watch_prop -clear {  oc8051_top|wb_clk_i - Estimated Frequency } {  oc8051_top|wb_clk_i - Requested Frequency } {  System - Estimated Frequency } { oc8051_top Block Rams } { oc8051_top Total Luts }
@