head	1.2;
access;
symbols
	isorc2008_submission:1.1.1.1
	handbook_alpha_edition:1.1.1.1
	jtres2007_submission:1.1.1.1
	bg1_07:1.1.1.1
	bg1_06:1.1.1.1
	bg1_05:1.1.1.1
	TAL_101:1.1.1.1
	TAL_100:1.1.1.1
	jtres_submission:1.1.1.1
	wises06_submission:1.1.1.1
	lctes2006_submission:1.1.1.1
	rtgc_isorc2006:1.1.1.1.0.4
	isorc2006:1.1.1.1.0.2
	rtgc_paper:1.1.1.1
	bg1_00:1.1.1.1
	nohandle:1.1.1.1
	thesis:1.1.1.1
	arelease:1.1.1.1
	avendor:1.1.1;
locks; strict;
comment	@;; @;


1.2
date	2008.02.23.23.31.25;	author martin;	state dead;
branches;
next	1.1;
commitid	126547c0accc4567;

1.1
date	2004.02.19.13.20.52;	author martin;	state Exp;
branches
	1.1.1.1;
next	;

1.1.1.1
date	2004.02.19.13.20.52;	author martin;	state Exp;
branches;
next	;


desc
@@


1.2
log
@JOP goes GPL
@
text
@//
//	mem.asm
//
//		memory test
//
//
//	io register
//
io_addr		=	0
io_data		=	1
mem_rd_addr	= 2		// st
mem_rd_data	= 2		// ld
mem_wr_addr	= 3		// st
mem_status	= 3		// ld
mem_wr_data	= 4		// st
mem_cancel	= 4		// ld

//
//	io address
//
io_inp		=	0
io_outp		=	0
io_status	=	1
io_uart		=	2
io_ecp		=	3
io_wd		=	7
io_cnt		=	10
io_ms		=	11


ua_rdrf		= 	2
ua_tdre		= 	1

//
//	first vars for start
//
	mp		?		// pointer to method struct (two words in cpool)
	cp		?		// pointer to constants
	heap	?		// start of heap

	extbc	?		// flag if bc load is neccessary

//
//	local vars
//
a			?
b			?
c			?


//
//	but starts with pc=0!!! (so init bc is not really necassary)
//
			ldi	127
			nop			// written in adr/read stage!
			stsp




loop_cnt	= 32768

loop:
			ldi 0
			stm	a

// ldi 1
// nop
// bnz rd_loop
// nop
// nop

			ldi	io_wd
			stioa
			ldi	1
			stiod
wr_loop:

sys_wr_mem:
			ldm	a
			stmwa				// write ext. mem address
			ldm a
			stmwd				// write ext. mem data
			nop
			wait
			wait

			ldm	a
			ldi	1
			add
			stm	a

			ldm	a
			ldi	loop_cnt
			xor
			nop
			bnz	wr_loop
			nop
			nop


			ldi 0
			stm	a

			ldi	io_wd
			stioa
			ldi	0
			stiod
rd_loop:


sys_rd_mem:
			ldm	a
			stmra				// read ext. mem, mem_bsy comes one cycle later
			nop
			wait
			wait
			ldmrd		 		// read ext. mem

			ldm	a
			xor
			nop
			bnz	loop
			nop
			nop

			ldm	a
			ldi	1
			add
			stm	a

			ldm	a
			ldi	loop_cnt
			xor
			nop
			bnz	rd_loop
			nop
			nop

			ldi	1
			nop
			bnz	loop
			nop
			nop
@


1.1
log
@Initial revision
@
text
@@


1.1.1.1
log
@initial cvs import.
@
text
@@