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1.1
date	2006.11.01.20.02.05;	author samiam95124;	state Exp;
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	1.1.1.1;
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1.1.1.1
date	2006.11.01.20.02.05;	author samiam95124;	state Exp;
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1.1.1.2
date	2006.11.11.12.04.54;	author samiam95124;	state Exp;
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1.1.1.3
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desc
@@


1.1
log
@Initial revision
@
text
@WARNING:PhysDesignRules:372 - Gated clock. Clock net select1/selectd/_and0000 is
   sourced by a combinatorial pin. This is not good design practice. Use the CE
   pin to control the loading of data into the flip-flop.
WARNING:PhysDesignRules:372 - Gated clock. Clock net select1/selecta/_and0000 is
   sourced by a combinatorial pin. This is not good design practice. Use the CE
   pin to control the loading of data into the flip-flop.
WARNING:PhysDesignRules:372 - Gated clock. Clock net select1/selectb/_and0000 is
   sourced by a combinatorial pin. This is not good design practice. Use the CE
   pin to control the loading of data into the flip-flop.
WARNING:PhysDesignRules:372 - Gated clock. Clock net select1/selectc/_and0000 is
   sourced by a combinatorial pin. This is not good design practice. Use the CE
   pin to control the loading of data into the flip-flop.
DRC detected 0 errors and 4 warnings.
@


1.1.1.1
log
@8080 CPU project
@
text
@@


1.1.1.2
log
@8080 CPU project
@
text
@d1 1
a1 1
WARNING:PhysDesignRules:372 - Gated clock. Clock net select1/selectb/_and0000 is
d7 1
a7 1
WARNING:PhysDesignRules:372 - Gated clock. Clock net select1/selectc/_and0000 is
d10 1
a10 1
WARNING:PhysDesignRules:372 - Gated clock. Clock net select1/selectd/_and0000 is
@


1.1.1.3
log
@8080 CPU project
@
text
@d1 1
a1 1
WARNING:PhysDesignRules:372 - Gated clock. Clock net select1/selectc/_and0000 is
d7 1
a7 1
WARNING:PhysDesignRules:372 - Gated clock. Clock net select1/selectd/_and0000 is
d10 1
a10 1
WARNING:PhysDesignRules:372 - Gated clock. Clock net select1/selectb/_and0000 is
d13 1
a13 10
WARNING:PhysDesignRules:812 - Dangling pin <DOA5> on
   block:<adm3a/display/Mram_atrbuf1/adm3a/display/Mram_atrbuf1.A>:<RAMB16_RAMB1
   6A>.
WARNING:PhysDesignRules:812 - Dangling pin <DOA6> on
   block:<adm3a/display/Mram_atrbuf1/adm3a/display/Mram_atrbuf1.A>:<RAMB16_RAMB1
   6A>.
WARNING:PhysDesignRules:812 - Dangling pin <DOA7> on
   block:<adm3a/display/Mram_atrbuf1/adm3a/display/Mram_atrbuf1.A>:<RAMB16_RAMB1
   6A>.
DRC detected 0 errors and 7 warnings.
@


