{
   "containers": {
      "cna": {
         "providerMetadata": {
            "orgId": "f4215fc3-5b6b-47ff-a258-f7189bd81038"
         },
         "descriptions": [
            {
               "lang": "en",
               "value": "In the Linux kernel, the following vulnerability has been resolved:\n\nspi: microchip-core: ensure TX and RX FIFOs are empty at start of a transfer\n\nWhile transmitting with rx_len == 0, the RX FIFO is not going to be\nemptied in the interrupt handler. A subsequent transfer could then\nread crap from the previous transfer out of the RX FIFO into the\nstart RX buffer. The core provides a register that will empty the RX and\nTX FIFOs, so do that before each transfer."
            }
         ],
         "affected": [
            {
               "product": "Linux",
               "vendor": "Linux",
               "defaultStatus": "unaffected",
               "repo": "https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git",
               "programFiles": [
                  "drivers/spi/spi-microchip-core.c"
               ],
               "versions": [
                  {
                     "version": "9ac8d17694b6",
                     "lessThan": "3feda3677e8b",
                     "status": "affected",
                     "versionType": "git"
                  },
                  {
                     "version": "9ac8d17694b6",
                     "lessThan": "45e03d35229b",
                     "status": "affected",
                     "versionType": "git"
                  },
                  {
                     "version": "9ac8d17694b6",
                     "lessThan": "9cf71eb0faef",
                     "status": "affected",
                     "versionType": "git"
                  }
               ]
            },
            {
               "product": "Linux",
               "vendor": "Linux",
               "defaultStatus": "affected",
               "repo": "https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git",
               "programFiles": [
                  "drivers/spi/spi-microchip-core.c"
               ],
               "versions": [
                  {
                     "version": "6.0",
                     "status": "affected"
                  },
                  {
                     "version": "0",
                     "lessThan": "6.0",
                     "status": "unaffected",
                     "versionType": "custom"
                  },
                  {
                     "version": "6.6.44",
                     "lessThanOrEqual": "6.6.*",
                     "status": "unaffected",
                     "versionType": "custom"
                  },
                  {
                     "version": "6.10.3",
                     "lessThanOrEqual": "6.10.*",
                     "status": "unaffected",
                     "versionType": "custom"
                  },
                  {
                     "version": "6.11",
                     "lessThanOrEqual": "*",
                     "status": "unaffected",
                     "versionType": "original_commit_for_fix"
                  }
               ]
            }
         ],
         "references": [
            {
               "url": "https://git.kernel.org/stable/c/3feda3677e8bbe833c3a62a4091377a08f015b80"
            },
            {
               "url": "https://git.kernel.org/stable/c/45e03d35229b680b79dfea1103a1f2f07d0b5d75"
            },
            {
               "url": "https://git.kernel.org/stable/c/9cf71eb0faef4bff01df4264841b8465382d7927"
            }
         ],
         "title": "spi: microchip-core: ensure TX and RX FIFOs are empty at start of a transfer",
         "x_generator": {
            "engine": "bippy-c9c4e1df01b2"
         }
      }
   },
   "cveMetadata": {
      "assignerOrgId": "f4215fc3-5b6b-47ff-a258-f7189bd81038",
      "cveID": "CVE-2024-42279",
      "requesterUserId": "gregkh@kernel.org",
      "serial": "1",
      "state": "PUBLISHED"
   },
   "dataType": "CVE_RECORD",
   "dataVersion": "5.0"
}