Re: [fpu] *is not it a cooperative work?*

["Yoshiaki Naruse" <sysworks@saitama-j.or.jp>]

Hi all

 I am quite new to this group.  And had been watching
your conversations for almost 14 days to find out if 
anything I could be any help or assist. 

 As I do not have any verilog-tool in hand , I am to 
confess that, in this instance now, I found no chance 
nor rights to get attend into this work group.
 
Please let me know if anything, beside money, I can 
contribute for (^^;).

Tools I can use for are: 
  leonardo(VHDL synth v2000.1a),   
  MTI(VHDL sim v5.4b), 
  Pspice(v9), 
  Watcom-C(v11J) ,
  MatLab+simulink(R11)
My basic background is analog circuit design, educated
in era of stones, running a tiny private company.

Best regards.

--------  Yoshiaki Naruse  --------------------
E-mail :  sysworks@saitama-j.or.jp
URL   :   http://www.saitama-j.or.jp/~sysworks