RE: [fpu] FPU operations

["Rudolf Usselmann" <russelmann@hotmail.com>]

>From: owner-fpu@opencores.org [mailto:owner-fpu@opencores.org]On Behalf
>Of Jamil Khatib
>
>I agree with you on all what you said but do not think
>that the comparison results are used only after
>compare instruction?

Well, yes and no. It's true that the comparator may run in
parallel to all other operations. However, none of the standard
instructions will look at those status bits (as far as I know).
The comparator will operate on operands A and B, so if I do
an ADD of A and B, I don't care about 'larger then' or 'smaller
then' or 'equal' flags. I can see that 'unordered' and 'infinity'
might be useful, but even then, I don't see how and ADD instruction
(for example) can use those status flags.


One thing came to mind thou: A result==zero status flag *might* be
useful, if there are 'increment and jump if zero' or 'decrement
and jump if zero' (and whatever other variations one can come up with)
are. The type of instructions are typical for integer operations, I'm
not sure if they make sense for floating point ...

>so they will act as register from
>teh cpu point of view that will be read only after the
>comparison.

No, again, this is something the CPU MUST do. All outputs might
change every cycle, as the inputs change (however, pipelined).
The CPU must track the results and status information. The FPU
is nothing else as a pipelined calculation engine, it has no
states.


>Damjan can OR1k handel different speeds of execution
>units? does teh FPU have to do any action regarding
>that or should I assume that all instructions will be
>ordered properly that no contention will be on teh
>result interface?
>
>Regards
>Jamil Khatib

rudi

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