Re: [fpu] Re: FPU spec

[Damjan Lampret <damjanlampret@yahoo.com>]

--- Rudolf Usselmann <russelmann@hotmail.com> wrote:
> 
> From: Jamil Khatib <jamilkhatib75@yahoo.com>
> >
> ....
> >
> >I'd like to suggest to represent NaN as 1 in the msb
> >of the fraction and all other bits as zeros. The
> >standard does not define the fraction bits of NaN. The
> >exponent should be all ones and the fraction should
> >not be all zeros. Some times my suggested
> >representation is called SNaN Signaling NaN, and I do
> >not know if we should support it in our design.
> 
> Actually there are two type of NaNs:
> 1) Signaling NAN. This type of NAN will cause an exception i.e.
> a trap to be asserted.
> 2) Quiet NAN. This type of NAN will propegate and not cause
> any traps or exceptions.
> 
> I believe a semi-standard has evolved where MSB of the fraction
> qualifies quiet from signaling NANs. The remaining bits of the
> fraction
> are irrelevant (except that they can not be all zerro for a NAN; a
> fraction 
> of all zero becomes a INF. Both of this are true when the
> exponent is all ones).
> I think forcing the bits to any value does only add logic. Anything
> above 
> the above variations of SNAN and QNAN, is in my oppenion not needed.
> 
> You should read the actual IEEE-754 specificatipon and the
> requirements.
> Most "summaries" of the standard that are offered at public web sites
> are 
> incompleate and might have erros. I suggest to get the real thing
> from IEEE 
> (www.ieee.org).
> 

Please check Altivec's document (I sent URL to the list yesterday). It
mentions exactly what IEEE-754 standard says about handling QNANs and
SNANs. Altough I agree it would be better to have official standard but
since we don't have one we can at least gather information from several
second sources and get more information about the standard.

regards,
Damjan


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