Re: [oc] Real newbie questions

[Rudolf Usselmann <rudi@asics.ws>]

On Tue, 2003-01-21 at 17:17, Lars Segerlund wrote:
> 
>   Now, VHDL/Verilog AHPL and so on is actually very good for programing, 
> the programed design is indispensible for the verification of the 
> circuit. Also this 'programmed' model can be a good base to start the 
> hardware abstraction from, since it is easier to do a 'stepwise 
> refinement' of the choosen design and perhaps some redesing during the 
> HW description phase.

Lets not confuse what we are talking about: You do not program
when you are designing a circuit. You are describing the behavior
of the circuit.

Sometimes, people use a style similar to conventional programming
languages to write a test bench. These test benches might have a
lot of sequential code. This is however very seldom synthesizable
code.

When somebody talks about "designing a circuit" (like the original
poster), he will be using HDL to *describe* the behavior of a
circuit in the first place, and there fore needs to be aware of
the fundamental differences if he wants to succeed in his task.
Hence the term "head rearrangement" - I really like that term,
can I trade mark it before MicroShit does ? ;*)

>   However, the same problems applies to software in general, everyone 
> want's to work with the abstractions, but when you want things to rock'n 
> roll you have to get dirty ;-) ... nothing new under the sun.
> 
>   Try programming a PCI spec :-) ... and if yo can do that,synthesize it!

Exactly, you will describe one or multiple State Machines that
will monitor and drive many different signals simultaneously -
quite different from traditional programming.

>   / Lars Segerlund.


rudi
------------------------------------------------
www.asics.ws   - Solutions for your ASIC needs -
FREE IP Cores  -->   http://www.asics.ws/  <---
-----  ALL SPAM forwarded to: UCE@FTC.GOV  -----




--
To unsubscribe from cores mailing list please visit http://www.opencores.org/mailinglists.shtml