RE: [oc] Sequential processing in VHDL? Whats the best way to do it?

["Morris, Scott J" <morris.scott@pnl.gov>]

Couldn't you use variable inside the process and modify signals with the
variables?  Of course I don't know a whole lot about VHDL.

-----Original Message-----
From: Paul McFeeters [mailto:paul.mcfeeters@ntlworld.com]
Sent: Friday, December 07, 2001 4:23 AM
To: cores@opencores.org
Subject: [oc] Sequential processing in VHDL? Whats the best way to do
it?


Hi,

I have started working on my own version of Handel-C to convert C into VHDL
(couldn't find $75,000 laying around the house). The first problem I
obviously encountered was that VHDLs sequential processes don't work as
high-level programmers would expect them to. I'm using signals for global
variables but in VHDL sequential logic processes the signals are not
actually updated until the process finishes. Hence as we all know the
following example IF statement always fails.

-- on entry x is always 10
check_x : process (clock)
begin
	x <= 6 ;
	if (x = 6) then
		-- this code section will never be called as x will only
change after the
process has finished
	end if ;
end process ;

I presume this is why even Celoxica have to synchronise their Handel-C code
with a clock. The best way I have found of doing it so far is to adopt an
approach similar to  how I presume CPU cores do it. This is my plan so far,
each C statement will need its own process. The following example is my best
(and working yippee) way of doing it.

signal PC : natural ;

-- on startup PC = 0
execute : process (clock)
begin

	case PC is

		when 0 =>
			x <= 6 ;
			PC <= 1 ;

		when 1 =>
			if (x=6) then
				-- this code will be executed, admittedly a
clock cycle after the
assignment but at least it works
			end if;
			PC <= 2 ;

		when 2 =>
			etc...

	end case

end process ;


If anybody has a better, neater or faster way of doing it then I would love
to know it. I've found the source code for a mini-C compiler so will use
that for lexical parsing and once I have the VHDL backend sorted I'll be
calling for guinea pigs.

I did think that if you made the process itself sensitive to 'PC' then once
the process has finished and thus PC is updated it would then call the
process again thus making things easier. Unfortunately the error that comes
from Webpack leaves me in no uncertain terms that it can't be done that way.
If anybody thinks that another synthesising tool may allow it then please
again let me know.

Thanks

Paul McFeeters




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