Re: [oc] Any using VHDL procedures with Xilinx Webpack?

["Jim Dempsey" <dempsey@northnet.net>]

When this type of thing happens to a C/C++ program one of the common
culprits is caused by a recursion in #include files. Might this be happening
with your modifications?

Jim Dempsey

----- Original Message -----
From: "Paul McFeeters" <paul.mcfeeters@ntlworld.com>
To: <cores@opencores.org>
Sent: Thursday, December 06, 2001 1:52 AM
Subject: [oc] Any using VHDL procedures with Xilinx Webpack?


> Hi,
>
> I seem to have run into a strange problem with the Xilinx webpack and was
> just wondering if anybody had encountered/beaten it. My VHDL module
compiled
> fine, it wasn't the prettiest module around so I decided to move some
> repetitive code into procedures just to make it more readable. Then the
fun
> started, Xilinx Webpack now says:
>
> ERROR:Portability:3 - This Xilinx application has run out of memory or has
> encountered a memory conflict.  Current memory usage is 25856 kb.  Memory
> problems may require a simple increase in available system memory, or
> possibly a fix to the software or a special workaround.  To troubleshoot
or
> remedy the problem, first:  Try increasing your system's RAM.
> Alternatively, you may try increasing your system's virtual memory or swap
> space.  If this does not fix the problem, please try the following:
Search
> the Answers Database at support.xilinx.com to locate information on this
> error message.  If neither of the above resources produces an available
> solution, please use Web Support to open a case with Xilinx Technical
> Support off of support.xilinx.com.  As it is likely that this may be an
> unforeseen problem, please be prepared to submit relevant design files if
> necessary.
>
> Ah ha I say, I'll try compiling it under Win2k instead of 98 as it has
> better memory management (doesn't penalise when you use more than 128MB
> physical memory). So I install Webpack under Win2k on a PC and run it with
> exactly the same project so now the error is:
>
> FATAL_ERROR:Xst:Portability/export/Port_Main.h:116:1.9 - This application
> has discovered an exceptional condition from which
>  it cannot recover.Process will terminate.  To resolve this error, please
> consult the Answers Database and other online resources at
> http://support.xilinx.com
>
> I've looked at support.xilinx.com but would rather understand why exactly
> the same instructions but just rearranged as little 5 line procedures
should
> be so explosive to Xilinx software. I'm just off to try converting them to
> functions (fingers crossed) as a work-around but thought I would check to
> see what others more proficient in VHDL had encountered in the past. Also
> maybe a procedure inside a component would work better? If all ease fails
> then I'll see about downloading a service pack but would rather
investigate
> the error first than simply patch it and forget it. Probably the decade I
> spent as a professional programmer rubbing off.
>
> Thanks in advance
>
> Paul McFeeters
> mailto:paul.mcfeeters@ntlworld.com
>
>
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