[oc] UART core

[Michael Attenborough <michael@brainboxes.com>]

Hi,
I have only recently come across opencores.org - I've always wanted to do 
some open-source work, although unfortunately I don't have a lot of time I
can spend on it.

I'm particularly interested in the UART core, as I have been working with 
UARTs for a few years and I feel I undestand them well - in fact, I have 
been working on a UART core at work (unfortunately, if the company uses
it then it will probably want to keep hold of the source).  Anyhow, maybe
I can at least help with the design and testing of the opencores UART.

But to start with - where can I see a spec, and where is the design up to?
The core I was writing had to be very compatible with the TI 16C550, for 
backwards-compatibility reasons. I guess the opencores UART might be
quite different.

I'm also wondering what you are doing about using patented ideas?  When
I was looking at buying a UART core, I was told that there are patent issues
in the US because Motorola have a patent on "any UART with a FIFO".
I couldn't find such a patent, but I did find a patent (number 4,823,312) by
National Semi which bears a strong resemblance to a 16C750 UART.
I don't understand patenting enough to know what the implications, if any,
of this are.

In case you wanted to know, the design software I am using is "FPGA 
Advantage" (used to be called "Packaged Power") which comprises the
Renoir Graphical front end, Modelsim VHDL simulator, and Leonardo
Spectrum Level 2 synthesis (targets any FPGA/CPLD family).

Regards,

	Michael Attenborough

-- 


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